--
-- Author: Chad Nelson
-- Date: 2/29/2012
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library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

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entity Sobel is
    port(
             r0c0: in std_logic_vector(7 downto 0);
             r1c0: in std_logic_vector(7 downto 0);
             r2c0: in std_logic_vector(7 downto 0);
             r0c1: in std_logic_vector(7 downto 0);
             
             r2c1: in std_logic_vector(7 downto 0);
             r0c2: in std_logic_vector(7 downto 0);
             r1c2: in std_logic_vector(7 downto 0);
             r2c2: in std_logic_vector(7 downto 0);
             
         data_out: out std_logic_vector(7 downto 0);
    );
end Sobel;

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architecture behv of Sobel is

    -- TODO signal definitions

begin

    -- TODO architecture
    -------X GRADIENT APPROXIMATION------
    -- sumX =     -r0c0 +     r0c2 + 
    --        -2 * r1c0 + 2 * r1c2 + 
    --            -r2c0 +     r2c2;
        
    -------Y GRADIENT APPROXIMATION-------
    -- sumY =     r0c0 +     -r2c0 + 
    --        2 * r0c1 + -2 * r2c1 + 
    --            r0c2 +     -r2c2;

    ---GRADIENT MAGNITUDE APPROXIMATION ----
    -- SUM = abs(sumX) + abs(sumY);
    
    -- MIN of 0, MAX of 255

end behv;

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